Jannis/BoredOS
1
0
Fork 0
mirror of https://github.com/JannisHeydemann/BoredOS.git synced 2026-05-30 02:16:58 +00:00
Code Issues Packages Projects Releases Wiki Activity

src/kernel --> src/

Browse Source
This commit is contained in:
boreddevnl
2026-03-16 00:30:47 +01:00
parent 3da1496e4f
commit fc83d7941b
630 changed files with 2 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files

19
src/arch/boot.asm Normal file
View File

@@ -0,0 +1,19 @@
; 64-bit Entry Point for BoredOS
; Copyright (c) 2023-2026 Chris (boreddevnl)
; This software is released under the GNU General Public License v3.0. See LICENSE file for details.
; This header needs to maintain in any file it is present in, as per the GPL license terms.
section .text
global _start
extern kmain
bits 64
_start:
cli
call kmain
hlt
.loop:
jmp .loop

31
src/arch/gdt_asm.asm Normal file
View File

@@ -0,0 +1,31 @@
; Copyright (c) 2023-2026 Chris (boreddevnl)
; This software is released under the GNU General Public License v3.0. See LICENSE file for details.
; This header needs to maintain in any file it is present in, as per the GPL license terms.
global gdt_flush
global tss_flush
section .text
gdt_flush:
lgdt [rdi] ; Load GDT from the pointer passed in RDI
mov ax, 0x10 ; 0x10 is the offset in the GDT to data segment
mov ds, ax
mov es, ax
mov fs, ax
mov gs, ax
mov ss, ax
; Far jump to update CS
push 0x08 ; 0x08 is the offset to the code segment
lea rax, [rel .flush]
push rax
retfq
.flush:
ret
tss_flush:
mov ax, 0x28 ; 0x28 is the offset in the GDT to the TSS
ltr ax
ret

191
src/arch/interrupts.asm Normal file
View File

@@ -0,0 +1,191 @@
; Copyright (c) 2023-2026 Chris (boreddevnl)
; This software is released under the GNU General Public License v3.0. See LICENSE file for details.
; This header needs to maintain in any file it is present in, as per the GPL license terms.
section .text
global isr0_wrapper
global isr1_wrapper
global isr8_wrapper
global isr12_wrapper
global isr14_wrapper
extern timer_handler
extern keyboard_handler
extern mouse_handler
extern exception_handler_c
; Helper to send EOI (End of Interrupt) to PIC
send_eoi:
push rax
mov al, 0x20
out 0x20, al ; Master PIC
pop rax
ret
%macro ISR_NOERRCODE 2
isr%2_wrapper:
push 0 ; Dummy error code
push %2 ; Vector
push rax
push rbx
push rcx
push rdx
push rsi
push rdi
push rbp
push r8
push r9
push r10
push r11
push r12
push r13
push r14
push r15
; Save SSE/FPU state
sub rsp, 512
fxsave [rsp]
; Pass current RSP as 1st argument (registers_t*)
mov rdi, rsp
call %1
; Update RSP with return value (task switch)
mov rsp, rax
; Restore SSE/FPU state
fxrstor [rsp]
add rsp, 512
pop r15
pop r14
pop r13
pop r12
pop r11
pop r10
pop r9
pop r8
pop rbp
pop rdi
pop rsi
pop rdx
pop rcx
pop rbx
pop rax
add rsp, 16 ; drop dummy vector and error code
iretq
%endmacro
isr0_wrapper:
ISR_NOERRCODE timer_handler, 32
isr1_wrapper:
ISR_NOERRCODE keyboard_handler, 33
isr12_wrapper:
ISR_NOERRCODE mouse_handler, 44
; Common exception macro for exceptions WITHOUT error code
%macro EXCEPTION_NOERRCODE 1
global exc%1_wrapper
exc%1_wrapper:
push 0 ; Dummy error code
push %1 ; Vector
jmp exception_common
%endmacro
; Common exception macro for exceptions WITH error code
%macro EXCEPTION_ERRCODE 1
global exc%1_wrapper
exc%1_wrapper:
push %1 ; Vector
jmp exception_common
%endmacro
; Define all 32 standard exceptions
EXCEPTION_NOERRCODE 0 ; Divide Error
EXCEPTION_NOERRCODE 1 ; Debug
EXCEPTION_NOERRCODE 2 ; NMI
EXCEPTION_NOERRCODE 3 ; Breakpoint
EXCEPTION_NOERRCODE 4 ; Overflow
EXCEPTION_NOERRCODE 5 ; Bound Range Exceeded
EXCEPTION_NOERRCODE 6 ; Invalid Opcode
EXCEPTION_NOERRCODE 7 ; Device Not Available
EXCEPTION_ERRCODE 8 ; Double Fault
EXCEPTION_NOERRCODE 9 ; Coprocessor Segment Overrun
EXCEPTION_ERRCODE 10 ; Invalid TSS
EXCEPTION_ERRCODE 11 ; Segment Not Present
EXCEPTION_ERRCODE 12 ; Stack-Segment Fault
EXCEPTION_ERRCODE 13 ; General Protection Fault
EXCEPTION_ERRCODE 14 ; Page Fault
EXCEPTION_NOERRCODE 15 ; Reserved
EXCEPTION_NOERRCODE 16 ; x87 Floating-Point Exception
EXCEPTION_ERRCODE 17 ; Alignment Check
EXCEPTION_NOERRCODE 18 ; Machine Check
EXCEPTION_NOERRCODE 19 ; SIMD Floating-Point Exception
EXCEPTION_NOERRCODE 20 ; Virtualization Exception
EXCEPTION_ERRCODE 21 ; Control Protection Exception
EXCEPTION_NOERRCODE 22 ; Reserved
EXCEPTION_NOERRCODE 23 ; Reserved
EXCEPTION_NOERRCODE 24 ; Reserved
EXCEPTION_NOERRCODE 25 ; Reserved
EXCEPTION_NOERRCODE 26 ; Reserved
EXCEPTION_NOERRCODE 27 ; Reserved
EXCEPTION_NOERRCODE 28 ; Hypervisor Injection Exception
EXCEPTION_ERRCODE 29 ; VMM Communication Exception
EXCEPTION_ERRCODE 30 ; Security Exception
EXCEPTION_NOERRCODE 31 ; Reserved
exception_common:
; Save registers (registers_t structure)
push rax
push rbx
push rcx
push rdx
push rsi
push rdi
push rbp
push r8
push r9
push r10
push r11
push r12
push r13
push r14
push r15
; Save SSE/FPU state
sub rsp, 512
fxsave [rsp]
; Pass current RSP as 1st argument (registers_t*)
mov rdi, rsp
call exception_handler_c
; Switch stack if needed (for process termination)
mov rsp, rax
; Restore SSE/FPU state
fxrstor [rsp]
add rsp, 512
; Restore registers
pop r15
pop r14
pop r13
pop r12
pop r11
pop r10
pop r9
pop r8
pop rbp
pop rdi
pop rsi
pop rdx
pop rcx
pop rbx
pop rax
add rsp, 16 ; drop vector and error code
iretq

61
src/arch/process_asm.asm Normal file
View File

@@ -0,0 +1,61 @@
; Copyright (c) 2023-2026 Chris (boreddevnl)
; This software is released under the GNU General Public License v3.0. See LICENSE file for details.
; This header needs to maintain in any file it is present in, as per the GPL license terms.
global process_jump_usermode
section .text
process_jump_usermode:
cli
; Load user data segment (0x23)
mov ax, 0x23
mov ds, ax
mov es, ax
mov fs, ax
mov gs, ax
; Build the IRETQ stack frame
; 1. SS (User Data Segment)
push 0x23
; 2. RSP (User Stack)
push rsi
; 3. RFLAGS (Enable Interrupts: IF = 0x200 | Reserved bit 1 = 0x2 -> 0x202)
push 0x202
; 4. CS (User Code Segment)
push 0x1B
; 5. RIP (Entry Point)
push rdi
; Jump to Ring 3!
iretq
; void context_switch_to(uint64_t rsp)
; Restores context from isr frame and jumps
global context_switch_to
context_switch_to:
mov rsp, rdi
pop r15
pop r14
pop r13
pop r12
pop r11
pop r10
pop r9
pop r8
pop rbp
pop rdi
pop rsi
pop rdx
pop rcx
pop rbx
pop rax
add rsp, 16 ; drop int_no and err_code
iretq

94
src/arch/syscalls.asm Normal file
View File

@@ -0,0 +1,94 @@
; Copyright (c) 2023-2026 Chris (boreddevnl)
; This software is released under the GNU General Public License v3.0. See LICENSE file for details.
; This header needs to maintain in any file it is present in, as per the GPL license terms.
global syscall_entry
extern syscall_handler_c
section .text
; Syscall ABI:
; RDI = syscall_num
; RSI = arg1
; RDX = arg2
; R10 = arg3
; R8 = arg4
; R9 = arg5
syscall_entry:
; 1. Switch to Kernel Stack safely
; Note: For true SMP safety, we need per-CPU storage (via swapgs).
; For now, we use a global scratch which is only safe because we mask interrupts on entry.
mov [rel user_rsp_scratch], rsp
mov rsp, [rel kernel_syscall_stack]
; 2. Build iretq frame (compatible with registers_t)
push 0x1B ; SS (User Data)
push qword [rel user_rsp_scratch] ; RSP
push r11 ; RFLAGS (captured by syscall)
push 0x23 ; CS (User Code)
push rcx ; RIP (return address from syscall)
push 0 ; err_code
push 0 ; int_no (can be used for syscall vector)
; 3. Save all registers in registers_t order
push rax
push rbx
push rcx
push rdx
push rsi
push rdi
push rbp
push r8
push r9
push r10
push r11
push r12
push r13
push r14
push r15
; Save SSE/FPU state
sub rsp, 512
fxsave [rsp]
; 4. Call C handler with registers_t*
mov rdi, rsp
call syscall_handler_c
; 5. Switch to the resulting RSP (might be different if task switched)
mov rsp, rax
; Restore SSE/FPU state
fxrstor [rsp]
add rsp, 512
; 6. Restore and return via iretq
pop r15
pop r14
pop r13
pop r12
pop r11
pop r10
pop r9
pop r8
pop rbp
pop rdi
pop rsi
pop rdx
pop rcx
pop rbx
pop rax
add rsp, 16 ; drop int_no/err_code
; Debug: check RIP before iretq
; We can't easily print from here without destroying registers,
; but we can at least check if it's canonical.
iretq
section .bss
global kernel_syscall_stack
global user_rsp_scratch
kernel_syscall_stack: resq 1
user_rsp_scratch: resq 1

19
src/arch/test_syscall.asm Normal file
View File

@@ -0,0 +1,19 @@
; Copyright (c) 2023-2026 Chris (boreddevnl)
; This software is released under the GNU General Public License v3.0. See LICENSE file for details.
; This header needs to maintain in any file it is present in, as per the GPL license terms.
global test_syscall
section .text
test_syscall:
; syscall number in RDI
mov rdi, 1
; string pointer in RSI
lea rsi, [rel test_msg]
; The SYSCALL instruction
syscall
ret
section .rodata
test_msg: db "Hello from Syscall!", 10, 0

25
src/arch/user_test.asm Normal file
View File

@@ -0,0 +1,25 @@
; Copyright (c) 2023-2026 Chris (boreddevnl)
; This software is released under the GNU General Public License v3.0. See LICENSE file for details.
; This header needs to maintain in any file it is present in, as per the GPL license terms.
global user_test_function
section .text
user_test_function:
; Syscall convention
.loop:
; Invoke SYS_WRITE (Syscall #1)
mov rdi, 1 ; arg1: fd = 1 (stdout)
lea rsi, [rel msg] ; arg2: buffer (RIP-relative)
mov rdx, 15 ; arg3: length
mov eax, 1 ; syscall_num = 1 (SYS_WRITE)
syscall
; Some delay loop
mov rcx, 100000000
.delay:
dec rcx
jnz .delay
jmp .loop
msg: db "Hello syscall!", 10