mirror of
https://github.com/JannisHeydemann/BoredOS.git
synced 2026-05-30 02:16:58 +00:00
154 lines
6.2 KiB
C
154 lines
6.2 KiB
C
// Copyright (c) 2023-2026 Chris (boreddevnl)
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// This software is released under the GNU General Public License v3.0. See LICENSE file for details.
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// This header needs to maintain in any file it is present in, as per the GPL license terms.
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#include <stdint.h>
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#include "limine.h"
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#include <stddef.h>
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#include "platform.h"
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#include "kutils.h"
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static volatile struct limine_hhdm_request hhdm_request __attribute__((used, section(".requests"))) = {
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.id = LIMINE_HHDM_REQUEST,
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.revision = 0,
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.response = NULL
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};
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static volatile struct limine_kernel_address_request kernel_addr_request __attribute__((used, section(".requests"))) = {
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.id = LIMINE_KERNEL_ADDRESS_REQUEST,
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.revision = 0,
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.response = NULL
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};
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uint64_t hhdm_offset = 0;
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uint64_t kernel_phys_base = 0;
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uint64_t kernel_virt_base = 0;
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void platform_init(void) {
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if (hhdm_request.response) { hhdm_offset = hhdm_request.response->offset; }
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if (kernel_addr_request.response) {
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kernel_phys_base = kernel_addr_request.response->physical_base;
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kernel_virt_base = kernel_addr_request.response->virtual_base;
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}
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// Enable FPU and SSE
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uint64_t cr0;
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asm volatile("mov %%cr0, %0" : "=r"(cr0));
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cr0 &= ~(1ULL << 2); // Clear EM (Emulation)
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cr0 |= (1ULL << 1); // Set MP (Monitor Coprocessor)
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cr0 |= (1ULL << 5); // Set NE (Numeric Error)
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asm volatile("mov %0, %%cr0" : : "r"(cr0));
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uint64_t cr4;
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asm volatile("mov %%cr4, %0" : "=r"(cr4));
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cr4 |= (1ULL << 9); // Set OSFXSR (FXSAVE/FXRSTOR support)
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cr4 |= (1ULL << 10); // Set OSXMMEXCPT (SIMD exception support)
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asm volatile("mov %0, %%cr4" : : "r"(cr4));
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// Initialize FPU
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asm volatile("fninit");
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}
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uint64_t p2v(uint64_t phys) { return phys + hhdm_offset; }
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uint64_t v2p(uint64_t virt) {
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if (kernel_virt_base && virt >= kernel_virt_base) {
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return virt - kernel_virt_base + kernel_phys_base;
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}
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if (hhdm_offset && virt >= hhdm_offset) {
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return virt - hhdm_offset;
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}
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return virt;
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}
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void platform_get_cpu_model(char *model) {
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uint32_t brand[12];
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uint32_t eax, ebx, ecx, edx;
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for (uint32_t i = 0; i < 3; i++) {
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asm volatile("cpuid" : "=a"(eax), "=b"(ebx), "=c"(ecx), "=d"(edx) : "a"(0x80000002 + i));
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brand[i * 4 + 0] = eax;
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brand[i * 4 + 1] = ebx;
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brand[i * 4 + 2] = ecx;
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brand[i * 4 + 3] = edx;
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}
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char *p = (char *)brand;
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for (int i = 0; i < 48; i++) {
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model[i] = p[i];
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}
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model[48] = '\0';
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}
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void platform_get_cpu_vendor(char *vendor) {
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uint32_t eax, ebx, ecx, edx;
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asm volatile("cpuid" : "=a"(eax), "=b"(ebx), "=c"(ecx), "=d"(edx) : "a"(0));
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char *p = (char *)vendor;
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*((uint32_t *)&p[0]) = ebx;
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*((uint32_t *)&p[4]) = edx;
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*((uint32_t *)&p[8]) = ecx;
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p[12] = '\0';
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}
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void platform_get_cpu_info(cpu_info_t *info) {
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uint32_t eax, ebx, ecx, edx;
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// CPUID leaf 1: basic feature information
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asm volatile("cpuid" : "=a"(eax), "=b"(ebx), "=c"(ecx), "=d"(edx) : "a"(1));
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info->stepping = eax & 0xF;
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info->model = (eax >> 4) & 0xF;
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info->family = (eax >> 8) & 0xF;
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info->microcode = (ebx >> 8) & 0xFF;
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info->flags = ((uint64_t)ecx << 32) | edx; // ECX and EDX contain feature flags
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info->cache_size = (ebx >> 16) & 0xFF; // Cache line size in bytes
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}
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void platform_get_cpu_flags(char *flags_str) {
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uint32_t eax, ebx, ecx, edx;
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flags_str[0] = '\0';
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// CPUID leaf 1
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asm volatile("cpuid" : "=a"(eax), "=b"(ebx), "=c"(ecx), "=d"(edx) : "a"(1));
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// ECX flags
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if (ecx & (1 << 0)) k_strcpy(flags_str + k_strlen(flags_str), "sse3 ");
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if (ecx & (1 << 1)) k_strcpy(flags_str + k_strlen(flags_str), "pclmulqdq ");
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if (ecx & (1 << 3)) k_strcpy(flags_str + k_strlen(flags_str), "monitor ");
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if (ecx & (1 << 6)) k_strcpy(flags_str + k_strlen(flags_str), "ssse3 ");
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if (ecx & (1 << 9)) k_strcpy(flags_str + k_strlen(flags_str), "sdbg ");
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if (ecx & (1 << 12)) k_strcpy(flags_str + k_strlen(flags_str), "fma ");
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if (ecx & (1 << 13)) k_strcpy(flags_str + k_strlen(flags_str), "cx16 ");
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if (ecx & (1 << 19)) k_strcpy(flags_str + k_strlen(flags_str), "sse4_1 ");
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if (ecx & (1 << 20)) k_strcpy(flags_str + k_strlen(flags_str), "sse4_2 ");
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if (ecx & (1 << 23)) k_strcpy(flags_str + k_strlen(flags_str), "popcnt ");
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if (ecx & (1 << 25)) k_strcpy(flags_str + k_strlen(flags_str), "aes ");
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if (ecx & (1 << 26)) k_strcpy(flags_str + k_strlen(flags_str), "xsave ");
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if (ecx & (1 << 28)) k_strcpy(flags_str + k_strlen(flags_str), "avx ");
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// EDX flags
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if (edx & (1 << 0)) k_strcpy(flags_str + k_strlen(flags_str), "fpu ");
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if (edx & (1 << 3)) k_strcpy(flags_str + k_strlen(flags_str), "pse ");
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if (edx & (1 << 4)) k_strcpy(flags_str + k_strlen(flags_str), "tsc ");
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if (edx & (1 << 6)) k_strcpy(flags_str + k_strlen(flags_str), "pae ");
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if (edx & (1 << 8)) k_strcpy(flags_str + k_strlen(flags_str), "cx8 ");
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if (edx & (1 << 9)) k_strcpy(flags_str + k_strlen(flags_str), "apic ");
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if (edx & (1 << 11)) k_strcpy(flags_str + k_strlen(flags_str), "sep ");
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if (edx & (1 << 15)) k_strcpy(flags_str + k_strlen(flags_str), "cmov ");
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if (edx & (1 << 23)) k_strcpy(flags_str + k_strlen(flags_str), "mmx ");
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if (edx & (1 << 24)) k_strcpy(flags_str + k_strlen(flags_str), "fxsr ");
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if (edx & (1 << 25)) k_strcpy(flags_str + k_strlen(flags_str), "sse ");
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if (edx & (1 << 26)) k_strcpy(flags_str + k_strlen(flags_str), "sse2 ");
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// Extended leaf 0x80000001 for advanced flags
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asm volatile("cpuid" : "=a"(eax), "=b"(ebx), "=c"(ecx), "=d"(edx) : "a"(0x80000001));
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if (edx & (1 << 11)) k_strcpy(flags_str + k_strlen(flags_str), "syscall ");
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if (edx & (1 << 20)) k_strcpy(flags_str + k_strlen(flags_str), "nx ");
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if (edx & (1 << 26)) k_strcpy(flags_str + k_strlen(flags_str), "pdpe1gb ");
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if (edx & (1 << 27)) k_strcpy(flags_str + k_strlen(flags_str), "rdtscp ");
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if (edx & (1 << 29)) k_strcpy(flags_str + k_strlen(flags_str), "lm ");
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if (ecx & (1 << 0)) k_strcpy(flags_str + k_strlen(flags_str), "lahf_lm ");
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if (ecx & (1 << 5)) k_strcpy(flags_str + k_strlen(flags_str), "abm ");
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// Remove trailing space
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int len = k_strlen(flags_str);
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if (len > 0 && flags_str[len-1] == ' ') {
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flags_str[len-1] = '\0';
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}
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}
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